Computer Science: An Overview (13th Edition) (What's New in Computer Science)
13th Edition
ISBN: 9780134875460
Author: Glenn Brookshear, Dennis Brylow
Publisher: PEARSON
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Textbook Question
Chapter 3.3, Problem 4QE
If each time slice in a multiprogramming system is 50 milliseconds and each context switch requires at most a microsecond, how many processes can the machine service in a single second?
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Assume that a RISC processor executes each instruction in 2 microseconds and that an I/O device can only wait for 1 millisecond before its interrupt is handled. What is the maximum number of instructions that may be performed when interruptions are disabled?
Let us suppose, for the sake of simplicity, that each instruction on a RISC processor is processed in 2 microseconds and that an I/O device can only wait for an interrupt to be handled for a maximum of 1 millisecond before it is serviced.
When interruptions are turned off, the number of instructions that may be performed is limited.
Let's say, for the sake of simplicity, that a RISC processor executes each instruction in 2 microseconds and that an I/O device can only wait for an interrupt to be handled for a maximum of 1 millisecond before it is handled. Do you have any idea how many instructions can be run with interruptions disabled before they reach a certain number?
Chapter 3 Solutions
Computer Science: An Overview (13th Edition) (What's New in Computer Science)
Ch. 3.1 - Identify examples of queues. In each case,...Ch. 3.1 - Which of the following activities require...Ch. 3.1 - Prob. 3QECh. 3.1 - Prob. 4QECh. 3.2 - Prob. 1QECh. 3.2 - What is the difference between application...Ch. 3.2 - Prob. 3QECh. 3.2 - Prob. 4QECh. 3.3 - Summarize the difference between a program and a...Ch. 3.3 - Summarize the steps performed by the CPU when an...
Ch. 3.3 - Prob. 3QECh. 3.3 - If each time slice in a multiprogramming system is...Ch. 3.3 - Prob. 5QECh. 3.4 - Prob. 1QECh. 3.4 - Suppose a two-lane road converges to one lane to...Ch. 3.4 - Prob. 3QECh. 3.4 - Prob. 4QECh. 3.5 - Prob. 1QECh. 3.5 - Prob. 2QECh. 3.5 - If a process in a multiprogramming system could...Ch. 3 - List four activities of a typical operating...Ch. 3 - Summarize the distinction between batch processing...Ch. 3 - Prob. 3CRPCh. 3 - Prob. 4CRPCh. 3 - What is a multitasking operating system?Ch. 3 - Prob. 6CRPCh. 3 - On the basis of a computer system with which you...Ch. 3 - a. What is the role of the user interface of an...Ch. 3 - What directory structure is described by the path...Ch. 3 - Define the term process as it is used in the...Ch. 3 - Prob. 11CRPCh. 3 - What is the difference between a process that is...Ch. 3 - What is the difference between virtual memory and...Ch. 3 - Suppose a computer contained 512MB (MiB) of main...Ch. 3 - What complications could arise in a...Ch. 3 - What is the distinction between application...Ch. 3 - Prob. 17CRPCh. 3 - Summarize the booting process.Ch. 3 - Why is the booting process necessary?Ch. 3 - If you have a PC, record the sequence activities...Ch. 3 - Suppose a multiprogramming operating system...Ch. 3 - Prob. 22CRPCh. 3 - Prob. 23CRPCh. 3 - Prob. 24CRPCh. 3 - Prob. 25CRPCh. 3 - Would greater throughput be achieved by a system...Ch. 3 - Prob. 27CRPCh. 3 - What information is contained in the state of a...Ch. 3 - Identify a situation in a multiprogramming system...Ch. 3 - List in chronological order the major events that...Ch. 3 - Prob. 31CRPCh. 3 - Prob. 32CRPCh. 3 - Explain an important use for the test-and-set...Ch. 3 - Prob. 34CRPCh. 3 - Prob. 35CRPCh. 3 - Prob. 36CRPCh. 3 - Prob. 37CRPCh. 3 - Each of two robot arms is programmed to lift...Ch. 3 - Prob. 39CRPCh. 3 - Prob. 40CRPCh. 3 - Prob. 41CRPCh. 3 - Prob. 42CRPCh. 3 - Prob. 43CRPCh. 3 - Prob. 44CRPCh. 3 - Prob. 45CRPCh. 3 - Prob. 46CRPCh. 3 - Prob. 47CRPCh. 3 - Prob. 48CRPCh. 3 - Prob. 49CRPCh. 3 - Prob. 50CRPCh. 3 - Prob. 51CRPCh. 3 - Prob. 52CRPCh. 3 - How is the window manager related to the operating...Ch. 3 - Prob. 54CRPCh. 3 - Prob. 55CRPCh. 3 - Suppose you are using a multiuser operating system...Ch. 3 - Prob. 2SICh. 3 - Prob. 3SICh. 3 - Prob. 4SICh. 3 - Prob. 5SI
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- If each time slice in a multiprogramming system is 50 milliseconds and each context switch requires at most a microsecond, how many processes can the machine service in a single second?arrow_forwardAssume that a RISC processor executes each instruction in 2 microseconds and that an I/O device can wait no more than 1 millisecond for an interrupt to be handled. There is a limit on the number of instructions that may be executed with interrupts deactivated.arrow_forwardA RISC instruction pipeline has five stages with propagation delays of 20 ns, 25 ns, 20ns, 70 ns, and 40 ns, respectively. What is the clock period? If a non-pipelined CPU can process an instruction in 160 ns, what is the actual steady-state speedup of the pipeline?arrow_forward
- For simplicity, let us assume that each instruction on a RISC processor is executed in 2 microseconds and that an I/O device can only wait for an interrupt to be handled for a maximum of 1 millisecond before it is serviced. The number of instructions that may be executed when interruptions are deactivated is restricted to a certain number.arrow_forwardAssume that a RISC processor executes each instruction in two microseconds and that an I/O device can wait no more than one millisecond before its interrupt is handled. How many instructions can be performed with interruptions disabled?arrow_forwardAssume that a RISC processor takes 2 microseconds to execute each instruction and that an I/O device can wait at most 1 millisecond before its interrupt is serviced. What is the maximum number of instructions that can be executed with interrupts disabled?arrow_forward
- Assume that a RISC processor executes each instruction in 2 microseconds and that a 1/O device can only wait for an interrupt to be serviced for 1 millisecond before it is serviced. The number of instructions that may be executed when interruptions are deactivated is restricted.arrow_forwardAssume a RISC processor takes two microseconds to execute each instruction and an I/O device can wait at most 1 millisecond before its interrupt is serviced. What is the maximum number of instructions that can be executed with interrupts disabled?arrow_forwardsuppose, a soft real-time system has 100 m bytes of program memory that is loaded at 75% 16M bytes of data memory that is loaded at 25% and 10 M bytes of stack area that is loaded at 50%. what is the total memory utilization?arrow_forward
- An interrupt from a CPU causes the processor to halt what it is doing and react to the signal received from the interrupt source. In order to finish this work, why should the operation be stopped? Let's start with the process of interrupting, and then go on to the process of executing the interrupting. explain?arrow_forwardAssume an I/O device may only wait for an interrupt to be handled for up to 1 millisecond, and that a RISC processor executes each instruction in 2 microseconds. There is a hard limit on the number of instructions that may be executed with interruptions deactivated.arrow_forwardIf we take interrupt latency into consideration, how long does it take to switch between contexts, for instance?arrow_forward
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