Q2- Design a modulo 4 counter that counts up if W=1 and counts down if W=0 at any count (Example if count =2 and W=1, next count will be 3 but if W=0 the next count will be 1). Use only T type F-F and mini- mum logic gates.
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- Electrical Engineering A B Out 0 Cout Please read. In Verilog only uses reg variables and model each gate using an always block. Describe it as a Verilog module with inputs A, B, Cin and outputs Outo and Cout. Introduce as many reg variables as needed and model each gate using an always block. i.e. Combinational logic is described as procedural blocks, but still maintaining concurrency. Also, write all the gates inside a single always block and see whether you can order their evaluations to obtain the correct results for Out_0 and Cout signals.Q/ What are the domains of logic gates?Consider a family of logic gates that operate under the static discipline with the following voltage thresholds: VI=1.5V, VOL=0.5V, VIH=3.5V, and VOH=4.4V. a. What is the lowest voltage that can be output by an inverter for a logical 1 output? Why? b. What is the highest voltage that must be interpreted by a receiver as logical 0? Why? c. What is the lowest voltage that must be interpreted by a receiver as logical 1? Why?
- Lab# Introduction to Logic Gates +5V FLED U1 AND2EE U2 INVEE GND R1. R2 1K 1K GŇD 3) Verification the circuits by using switches, LEDS, and function generator The above circuit has two inputs (A and B). Connect AND gate's output and Inverter's output to two separate LEDS to test whether these two gates work properly. (You can also connect inputs of the AND gate to different LEDS - they will indicate logic levels on inputs.) Verify circuit function by providing inputs from two separate switches.Consider a family of logic gates that operate under the static discipline with the following voltage thresholds: VI=1.5V, VOL=0.5V, VIH=3.5V, and VOH=4.4V. a. What is the lowest voltage that can be output by an inverter for a logical 1 output? Explain. b. What is the highest voltage that must be interpreted by a receiver as logical 0? Explain. c. What is the lowest voltage that must be interpreted by a receiver as logical 1? Explain.If a fault occurs in connections C5 (stuck-at-1) for the following logic circuit, the appropriate fault-test by using Boolean difference technique .......... C1 X1 Cs C2 X2 Cs C6 C10 C9 C7 t0 t2 t3 t1 O
- If we want to design a logic circuit that make selective complement for example, to complement the first two-bits of the number (1010) to become (1001) O using XOR gate with 0011 O using OR gate with 1100 O using XNOR gate with 1011 O using AND gate with 1100Q If we want to design a logic circuit that make selective set for example, the number (0001) to become (0111) O using XNOR gate with the same number as input O using XOR gate with the 0111 number as input using AND gate with the 0111 number as input using OR gate with the 0110 number as inputExample: Neglect the base currents. (a) What logic function is performed by this circuit? (b) What are the logic 1 and logic 0 values of Vo at the output? (c) When VA logic 0 for one of the two inputs, determine i, i ich ic and V. (d) Repeat part (c) when all inputs are logic 1. 2.6k2 Va iz 5V 1.2ΚΩ Q₁ Q₂ 1.6V Q2 Vo 0.8kQ
- Q/What are the uses of logic gates?The IC number of logic gate which is complement of X-NOR gate is a. 7404 O b. 7400 O c. 7432 O d. 7486Design a combinational circuit with 3-inputs and 1-output. The output is equal to logic-1 when the binary value of the input is less than 3. And the output is logic-0 otherwise.