Problem 4.1 A memory system is needed in a new design to support a small amount of data storage outside of the processor. The design is to be based on the 16 K bit CY7C128A SRAM orga- nized as 2 K x 8. (a) Provide a high-level block diagram for such an interface. (b) Provide a high-level timing diagram for the interface to the SRAM from the microprocessor, assuming that separate address and data busses are available. Define any control signals that may be necessary. (c) Design the interface based on the timing diagram from part (a). (d) Analyze the memory performance for a write and a read operation of 1, 10, and 100 bytes.

Problem 4.1 A memory system is needed in a new design to support a small amount of data storage outside of the processor. The design is to be based on the 16 K bit CY7C128A SRAM orga- nized as 2 K x 8. (a) Provide a high-level block diagram for such an interface. (b) Provide a high-level timing diagram for the interface to the SRAM from the microprocessor, assuming that separate address and data busses are available. Define any control signals that may be necessary. (c) Design the interface based on the timing diagram from part (a). (d) Analyze the memory performance for a write and a read operation of 1, 10, and 100 bytes.

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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