b. i. Using a detailed state diagram, explain how the instruction cycle can be expanded including the interrupt sub cycle and indirect sub cycle. ii. Following description is about values stored at particular memory locations and registers when a set of instructions are executed by the processor. An instruction is stored at memory addresses 100. Assume that the address field of the instruction has the value 300. Content of memory address,300 is 410. Further, assume that the 'content of memory address 400 is 340. The program counter has the value 100 for fetching this instruction. The content of processor register R is 730, and the content of index register XR is 201. o According to the given information, determine the operand values when the direct and indirect addressing modes are used. o Evaluate the effective address for each of the following addressing modes. o Register Indirect o Relative o Indexed
b. i. Using a detailed state diagram, explain how the instruction cycle can be expanded including the interrupt sub cycle and indirect sub cycle. ii. Following description is about values stored at particular memory locations and registers when a set of instructions are executed by the processor. An instruction is stored at memory addresses 100. Assume that the address field of the instruction has the value 300. Content of memory address,300 is 410. Further, assume that the 'content of memory address 400 is 340. The program counter has the value 100 for fetching this instruction. The content of processor register R is 730, and the content of index register XR is 201. o According to the given information, determine the operand values when the direct and indirect addressing modes are used. o Evaluate the effective address for each of the following addressing modes. o Register Indirect o Relative o Indexed
Chapter4: Processor Technology And Architecture
Section: Chapter Questions
Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...
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