Task 2: DESIGN A 4-TO-1 LINE MULTIPLEXER BY USING THREE 2-TO-1 MUXS. CONSIDER THAT INPUTS ARE I3,12,11,10 AND SELECTIVE LINES si,so ,GIVEN ACCORDING TO DEXCENDING SIGNIFICANCE ORDER. A) Write truth table. (Condensed version) B) Draw the logic diagram. (You can use the 2:1 MUX blocks or you can draw the circuit by using NAND & NOT GATES.) c) Simulate the circuit by using NAND & NOT GATES. Io (2:1 MUx BLOCK)

Task 2: DESIGN A 4-TO-1 LINE MULTIPLEXER BY USING THREE 2-TO-1 MUXS. CONSIDER THAT INPUTS ARE I3,12,11,10 AND SELECTIVE LINES si,so ,GIVEN ACCORDING TO DEXCENDING SIGNIFICANCE ORDER. A) Write truth table. (Condensed version) B) Draw the logic diagram. (You can use the 2:1 MUX blocks or you can draw the circuit by using NAND & NOT GATES.) c) Simulate the circuit by using NAND & NOT GATES. Io (2:1 MUx BLOCK)

Electric Motor Control

10th Edition

ISBN:9781133702818

Author:Herman

Publisher:Herman

Chapter22: Sequence Control

Section: Chapter Questions

Problem 6SQ: Draw a symbol for a solid-state logic element AND.

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