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- Most Intel CPUs use the __________, in which each memory address is represented by two integers.In the ________, memory addresses consist of a single integer.Suppose that a 2M × 16 main memory is built using 256K × 8 RAM chips and that memory is word addressable.1. a) How many RAM chips are necessary?2. b) If we were accessing one full word, how many chips would be involved? 3. c) How many address bits are needed for each RAM chip?4. d) How many banks will this memory have?5. e) How many address bits are needed for all memory?6. f) If high-order interleaving is used, where would address 14 (which is E in hex) be located?7. g) Repeat exercise 9f for low-order interleaving.
- Suppose we have 1G x 16 RAM chips that make up a 32G x 64 memory that uses high-order interleaving. (This means that each word is 64 bits in size and there are 32G of these words.) a) How many RAM chips are necessary? b) Assuming four chips per bank, how many banks are required? c) How many lines must go to each chip? d) How many bits are needed for a memory address, assuming it is word addressable? e) For the bits in part d, draw a diagram indicating many and which bits are used for chip select, and how many and which bits are used for the address on the chip.A microprocessor has a 32-bit address line. The size of the memory contents of each address is 8 bits. The memory space is defined as the collection of memory position the processor can address. What is the address range (lowest to highest, in hexadecimal) of the memory space for this microprocessor? What is the size (in bytes, KB, or MB) of the memory space? 1 KB = 21010 bytes, 1MB = 22020 bytes, 1GB = 23030 bytes A memory device is connected to the microprocessor. Base o the size of the memory, the microprocessor has assigned the addresses 0xA4000000 to 0xA07FFFFF to this memory device. What is the size (in bytes, KB, or MB) of this memory device? What is the minimum number of bits required to represent the addresses only for this memory device?Suppose that a 64M x 16 main memory is built using 512K × 8 RAM chips and memory is word-addressable. a) How many RAM chips are necessary?b) If we were accessing one full word, how many chips would be involved?c) How many address bits are needed for each RAM chip?d) How many banks will this memory have?e) How many address bits are needed for all of memory?f) If high-order interleaving is used, where would address 32(base 10) be located? (Your answer should be "Bank#, Offset#")g) Repeat (f) for low-order interleaving.
- Suppose the RAM for a certain computer has 4M words, where each word is 16 bits long. What is the capacity of this memory expressed in bytes? If this RAM is byte addressable, how many bits must an address contain? If this RAM is word addressable, how many bits must an address contain?% A Q1: the smallest addressable entity is called? * Your answer Q2: if address bus is 9 bits, then the size of memory is. . bytes * Your answer Q3: if memory size is 1KB, and word length is 32 bits. How many words are stored in the memory? * Your answer ΣSuppose that a 16M x 16 main memory is built using 512K x 8 RAM chips and that memory is word addressable. a) How many RAM chips are necessary? b) If we were accessing one full word, how many chips would be involved? c) How many address bits are needed for each RAM chip? d) How many banks will this memory have? e) How many address bits are needed for all memory? f) If high-order interleaving is used, where would address 14 (which is E in hex) be located? g) If low-order interleaving is used, where would address 14 (which is E in hex) be located?
- Suppose a computer using fully associative cache has 224224 bytes of byte-addressable main memory and a cache of 128 blocks, where each cache block contains 64 bytes. (a) How many blocks of main memory are there? (b) What is the format of a memory address as seen by the cache? (c) To which cache block will the memory address 0xD87216 map?Suppose that a 2M x 16 main memory is built using 256K × 8 RAM chips and memory is word-addressable. a) How many RAM chips are necessary? b) If we were accessing one full word, how many chips would be involved? c) How many address bits are needed for each RAM chip?Suppose a computer using fully associative cache has 224 words of main memory and a cache of 128 blocks, where each cache block contains 16 words. a. How many blocks of main memory are there? b. What is the format of a memory address as seen by the cache, that is, what are the sizes of the tag and word fields? c. To which cache block will the memory reference 01D87216 map?