Problem Statement: A combinational logic circuit is to be designed to implement the multi-function gate depicted below. X and Y are the select inputs that choose one of the three functions to implement, and B are the function data inputs. For example, if X = 0 and Y=0, the selected function is NAND; so F = A NAND B in this case. X 0 0 1 1 A B Y 0 1 0 1 F A NAND B A XOR B A OR B Undefined Multi- Function Gate F X Y Prelab (to be completed on Blackboard): 1) Write F in minimal SOP form. (Hint: make a truth table with inputs: X, Y, A, B). 3) Minimize Fusing Boolean algebra to design the combinational logic circuit using the fewest number of IC chips. The person(s) using the minimal number of IC chips will receive 5 points extra credit for this lab. Create your minimal logic diagram on the computer to be turned in on blackboard, and note the type and quantity of all SSI chips used.

Problem Statement: A combinational logic circuit is to be designed to implement the multi-function gate depicted below. X and Y are the select inputs that choose one of the three functions to implement, and B are the function data inputs. For example, if X = 0 and Y=0, the selected function is NAND; so F = A NAND B in this case. X 0 0 1 1 A B Y 0 1 0 1 F A NAND B A XOR B A OR B Undefined Multi- Function Gate F X Y Prelab (to be completed on Blackboard): 1) Write F in minimal SOP form. (Hint: make a truth table with inputs: X, Y, A, B). 3) Minimize Fusing Boolean algebra to design the combinational logic circuit using the fewest number of IC chips. The person(s) using the minimal number of IC chips will receive 5 points extra credit for this lab. Create your minimal logic diagram on the computer to be turned in on blackboard, and note the type and quantity of all SSI chips used.

Electric Motor Control

10th Edition

ISBN:9781133702818

Author:Herman

Publisher:Herman

Chapter22: Sequence Control

Section: Chapter Questions

Problem 6SQ: Draw a symbol for a solid-state logic element AND.

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