In this exercise we examine in detail how an instruction is executed in a single-cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word: 10101100100001010000000000010100 Assume that the data memory is all zeros and that the processor’s registers have the following values at the beginning of the cycle in which the above instruction word is fetched: R0 R1 R2 R3 R4 R5 R6 R8 R12 R31 0 1 -2 3 -4 5 -6 -8 -12 31 1. What are the outputs of the sign-extend and the jump “Shift-Left-2” (near the top of Figure 4.24) for this instruction word? 2. What are the values of ALU control unit’s inputs (ALUOp and Instruction operation) for this instruction? 3. What is the new PC address after this instruction is executed? Highlight the path through which this value is determined. 4. For the ALU and the two add units, what are their data input values? 5. What are the values of all inputs for the “Registers” unit?
In this exercise we examine in detail how an instruction is executed in a single-cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word: 10101100100001010000000000010100 Assume that the data memory is all zeros and that the processor’s registers have the following values at the beginning of the cycle in which the above instruction word is fetched: R0 R1 R2 R3 R4 R5 R6 R8 R12 R31 0 1 -2 3 -4 5 -6 -8 -12 31 1. What are the outputs of the sign-extend and the jump “Shift-Left-2” (near the top of Figure 4.24) for this instruction word? 2. What are the values of ALU control unit’s inputs (ALUOp and Instruction operation) for this instruction? 3. What is the new PC address after this instruction is executed? Highlight the path through which this value is determined. 4. For the ALU and the two add units, what are their data input values? 5. What are the values of all inputs for the “Registers” unit?
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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Question
In this exercise we examine in detail how an instruction is executed in a single-cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word: 10101100100001010000000000010100
Assume that the data memory is all zeros and that the processor’s registers have the following values at the beginning of the cycle in which the above instruction word is fetched:
R0 R1 R2 R3 R4 R5 R6 R8 R12 R31
0 1 -2 3 -4 5 -6 -8 -12 31
1. What are the outputs of the sign-extend and the jump “Shift-Left-2” (near the top of Figure 4.24) for this instruction word?
2. What are the values of ALU control unit’s inputs (ALUOp and Instruction operation) for this instruction?
3. What is the new PC address after this instruction is executed? Highlight the path through which this value is determined.
4. For the ALU and the two add units, what are their data input values?
5. What are the values of all inputs for the “Registers” unit?
![Instruction [25-0]
Shift
Jump address [31-0]
left 2
26
28
PC + 4 [31-28)
Add
Add ALU
result
Shift
left 2
RegDst
Jump
Branch
MemRead
MemtoReg
ALUOP
MemWrite
Instruction [31-26]
Control
ALUSrc
RegWrite
Instruction [25-21]
Read
address
Read
register 1 Read
data 1
Instruction [20-16]
Read
register 2
M
Zero
ALU ALU
result
Instruction
[31-0]
Address Read
data
Write
Read
Instruction
Instruction [15-11) x
register data 2
memory
Write
data Registers
Write Data
data memory
Instruction [15-0]
16
Sign-
32
extend
ALU
control
Instruction [5-0]
FIGURE 4.24
The simple control and datapath are extended to handle the jump
instruction.](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F53a7e5df-6b87-4866-b89a-3c131e9e27c5%2F90c2b1ab-28cc-45aa-b730-19f15faec809%2Fuaq9x65_processed.png&w=3840&q=75)
Transcribed Image Text:Instruction [25-0]
Shift
Jump address [31-0]
left 2
26
28
PC + 4 [31-28)
Add
Add ALU
result
Shift
left 2
RegDst
Jump
Branch
MemRead
MemtoReg
ALUOP
MemWrite
Instruction [31-26]
Control
ALUSrc
RegWrite
Instruction [25-21]
Read
address
Read
register 1 Read
data 1
Instruction [20-16]
Read
register 2
M
Zero
ALU ALU
result
Instruction
[31-0]
Address Read
data
Write
Read
Instruction
Instruction [15-11) x
register data 2
memory
Write
data Registers
Write Data
data memory
Instruction [15-0]
16
Sign-
32
extend
ALU
control
Instruction [5-0]
FIGURE 4.24
The simple control and datapath are extended to handle the jump
instruction.
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