For a system, RAM - 64KB, Block size - 4 bytes, Cache size - 128 bytes, 2-way Set Associative cache. CPU requires to access following memory locations while running a program "Test_Cache" 1024, 137, 11, 75, 74, 72, 133, 7, 69, 130, 129, 66, 65, 10, 5, 3 (for convenience, addresses are given in decimal). Calculate the Hit ratio assuming the cache is empty at the beginning. Also count the number of blocks replaced in cache memory if LRU (least Recently Used) is used as replacement algorithm. Please construct a table as follows and calkulate'provide info for each address. Block of Set no Consequence Comments, if any Memory address Hit/Miss Line RAM no

For a system, RAM - 64KB, Block size - 4 bytes, Cache size - 128 bytes, 2-way Set Associative cache. CPU requires to access following memory locations while running a program "Test_Cache" 1024, 137, 11, 75, 74, 72, 133, 7, 69, 130, 129, 66, 65, 10, 5, 3 (for convenience, addresses are given in decimal). Calculate the Hit ratio assuming the cache is empty at the beginning. Also count the number of blocks replaced in cache memory if LRU (least Recently Used) is used as replacement algorithm. Please construct a table as follows and calkulate'provide info for each address. Block of Set no Consequence Comments, if any Memory address Hit/Miss Line RAM no

Name: For a system, RAM - 64KB, Block size - 4 bytes, Cache size - 128 byte
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Description: For a system, RAM - 64KB, Block size - 4 bytes, Cache size - 128 bytes, 2-way Set Associative cache. CPU requires to access following memory locations while running a program "Test Cache".1024, 137, 11, 75, 74, 72, 133, 7, 69, 130, 129, 66, 65, 10,

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter11: Operating Systems

Section: Chapter Questions

Problem 30VE

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