Given the execution of the below instructions (and initial state in memory): MOV r1, #12; |1 ADD r2, r1,#10; 2 BL Loop ; 3 LDR r5, 1234; 10 Loop: MOV r3, #1; |11 MUL r4, r2,r3 ; 12 MOV pc,lr ; Given a direct mapped cache with 8 total word size lines (line 0-7), what is the final instruction stored in the cache line 2? BL Loop O Loop: MOV r3, #1 O LDR r5, 1234 O MOV pc,lr

Computer Networking: A Top-Down Approach (7th Edition)
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ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Note: This is referring to ARM architecture.

Given the execution of the below instructions (and initial state in memory):
MOV r1, #12;
|1
ADD r2, r1,#10;
2
BL
Loop ;
3
LDR r5, 1234;
10 Loop: MOV r3, #1;
|11
MUL r4, r2,r3 ;
12
MOV pc,lr ;
Given a direct mapped cache with 8 total word size lines (line 0-7), what is the final instruction
stored in the cache line 2?
BL Loop
O Loop: MOV r3, #1
O LDR r5, 1234
O MOV pc,lr
Transcribed Image Text:Given the execution of the below instructions (and initial state in memory): MOV r1, #12; |1 ADD r2, r1,#10; 2 BL Loop ; 3 LDR r5, 1234; 10 Loop: MOV r3, #1; |11 MUL r4, r2,r3 ; 12 MOV pc,lr ; Given a direct mapped cache with 8 total word size lines (line 0-7), what is the final instruction stored in the cache line 2? BL Loop O Loop: MOV r3, #1 O LDR r5, 1234 O MOV pc,lr
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