12. The ret instruction modifies theA. base registerB. bp registerC. flags registerD. instruction pointer register13. In a 8086 Microprocessor, the unit responsible for getting the instructions from memoryA. Execution UnitC. StackB. RegistersD. Bus Interface Unit14. What will be the contents of register AL after the following has been executedMOV BL, 8CHMOV AL, 7EHADD AL, BLA. OA and carry flag is 1C. 6A and carry flag is 1B. OA and carry flag is 0D. 6A and carry flag is 015. How many times does this loop?L1: MOV CX, 10НDEC CXJNZ L1А. 1В. 10С. 16D. forever (infinity loop)16. The effect of the following instructionsMOV AH, 01HINT 21HA. read a character into alB. read a character into dlC. display the character in alD. display the character in dl17. which of the following code will set the screen cursor at row 12 and column 20A. mov ah, 02hC. mov ah,02hmov dh,12mov dl,20B. mov ah,02hD. mov ah,01hmov dh,12mov dl,20mov dh,12mov dl,20mov dh,12mov dl,20int 21hint 10hint 10hint 10h

We know that there is nothing you can directly inject into the instruction pointer that will cause a…

12. The ret instruction modifies the A. base register B. bp register C. flags register D. instruction pointer register 13. In a 8086 Microprocessor, the unit responsible for getting the instructions from memory A. Execution Unit B. Registers C. Stack D. Bus Interface Unit 14. What will be the contents of register AL after the following has been executed MOV BL, 8CH MOV AL, 7EH ADD AL, BL A. OA and carry flag is 1 C. 6A and carry flag is 1 B. OA and carry flag is 0 D. 6A and carry flag is 0

12. The ret instruction modifies the A. base register B. bp register C. flags register D. instruction pointer register 13. In a 8086 Microprocessor, the unit responsible for getting the instructions from memory A. Execution Unit B. Registers C. Stack D. Bus Interface Unit 14. What will be the contents of register AL after the following has been executed MOV BL, 8CH MOV AL, 7EH ADD AL, BL A. OA and carry flag is 1 C. 6A and carry flag is 1 B. OA and carry flag is 0 D. 6A and carry flag is 0

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...

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If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the fetch cycle is 40% of the processor cycle time, what memory access speed is required to implement load operations with zero wait states and load operations with two wait states?
_____ is a CPU design technique in which instruction execution is divided into multiple stages and different instructions can execute in different stages simultaneously.
The time it takes to perform the fetch instruction and decode instruction steps is called the execution time. True or false?
Most Intel CPUs use the __________, in which each memory address is represented by two integers.
How does pipelining improve CPU efficiency? What’s the potential effect on pipelining’s efficiency when executing a conditional BRANCH instruction? What techniques can be used to make pipelining more efficient when executing conditional BRANCH instructions?
a. Response time b. Throughput c. Execution Time 2. The register that hold the address of the current instruction being executed is called a. Saved register b. Global pointer c. Stack pointer used to identify the d. Clock Rate d. Program counter
8086Microprocessor 1. Write a piece of code that exchanges a block of 236 bytes stored at locations starting at 54000H with another block starting at 56000H. • By using XCHG instruction. • By using MOV instruction.
8. The 8086 LOOP instruction decrements register for a 0 to decide if a jump occurs 9. The last executable instruction in a procedure must be 10.A bus cycle is equal to clocking. periods. 11. If AO is a logic 0, then the memory bank is selected. - 12.the 8086 processor is partitioned into two logical units------------ and and tests it
A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word ofmemory.a. How many bits are needed for the opcode?b. How many bits are left for the address part of the instruction?c. What is the maximum allowable size for memory?d. What is the largest unsigned binary number that can be accommodated in one word of memory?
5. The stack memory is addressed by a combination of the segment plus_ offset. 6. The PUSH and POP instructions always transfer -bit number between the stack and a register or memory location in the 8086 microprocessors. 7. For string instructions, DI always addresses data in the segment. 8. The 8086 LOOP instruction decrements register and tests it for a 0 to decide if a jump occurs 9. The last executable instruction in a procedure must be 10.A bus cycle is equal to clocking. periods. 11. If A0 is a logic 0, then the memory bank is selected. 12.the 8086 processor is partitioned into two logical units------------ and C. 13. ------- is the value of the control word register (CWR) of PPI 8255 if all ports are input 14.Fixed address for I/O instructions bytes while Variable address for --- --- ---bytes I/O instructions is 15. Write bus cycle need -clocks to complete one write of data to memory
Example 2 Write an instruction sequence to save the current contents of the 8086's flags in memory location MEM 1 and then reload the flags with the contents of memory location MEM2.
* Question Completion Status: Path: p QUESTION 3 What is the 8085 Assembly Language Instruction That do the follwing Logical OR operation between Accumulator and registers B For the toolbar, press ALT+F10 (PC) or ALT+FN+F10 (Mac). T TTT Paragraph Arial 3 (12pt) E= T T, e f Mashups MOV