1. Construct the SR Flip Flop circuit shown in Figure 5.1. PRE iIs equal to SET and CLR is equal to RESET. CLK should be connected to the TTL Pulse OUT. Connect Q and Qnot to the Logic Indicator. Realize the truth table according to the inputs in Table 3. Table 5.1 R Q" Functionality CLR 13 7400 7410 CLK Qnot 1 R 1 7400 7410 PRE 1 1, 1, 1. 1.

1. Construct the SR Flip Flop circuit shown in Figure 5.1. PRE iIs equal to SET and CLR is equal to RESET. CLK should be connected to the TTL Pulse OUT. Connect Q and Qnot to the Logic Indicator. Realize the truth table according to the inputs in Table 3. Table 5.1 R Q" Functionality CLR 13 7400 7410 CLK Qnot 1 R 1 7400 7410 PRE 1 1, 1, 1. 1.

Electric Motor Control

10th Edition

ISBN:9781133702818

Author:Herman

Publisher:Herman

Chapter22: Sequence Control

Section: Chapter Questions

Problem 6SQ: Draw a symbol for a solid-state logic element AND.

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