To achieve the speed-up of 91 on the previous larger problem with 100 processors, we assumed the load was perfectly balanced. That is, each of the 100 processors had 1% of the work to do. Instead, show the impact on speed-up if one processor's load is higher than all the rest. Calculate at 2% and 5%.
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- To achieve the speed-up of 20.5 on the larger problem with 40 processors, we assumed the load was perfectly balanced. Th at is, each of the 40 processors had 2.5% of the work to do. Instead, show the impact on speed-up if one processor's load is higher than all the rest. Calculate at twice the load (5%) and fi ve times the load (12.5%) for that hardest working processor. How well utilized are the rest of the processors?On the Motorola 68020 microprocessor, a cache access takes two clock cycles. Data access from main memory over the bus to the processor takes three clock cycles in the case of no wait state insertion; the data are delivered to the processor in parallel with delivery to the cache. a. Calculate the effective length of a memory cycle given a hit ratio of 0.9 and a clocking rate of 16.67 MHz. b. Repeat the calculations assuming insertion of two wait states of one cycle each per memory cycle. What conclusion can you draw from the results?You have implemented a serial algorithm, which takes 12 seconds on some input. Then you implemented a parallel version of the same algorithm and run it on the same input using four processors P1, P2, P3, P4, which take 2, 4, 3, and 3 seconds, respectively, to complete their assigned tasks. Assume that the total parallel overhead, including the initial setup of the parallel environment, is 2 seconds. What is the speedup factor of your parallel algorithm on this input?
- Q4. Write some code (e.g. a loop) in MIPS assembly where you would expect no speedup from a superscalar CPU over a scalar CPU. For that same code, would you expect any speedup from an out-of-order vs an in-order (superscalar) CPU?Consider two computers, P1 and P2, of the same instruction set (ISA). We have a program of 7.5x10⁹ instructions and we want to run this program on P1 and P2. The P1 computer is a 5 GHz machine with CPI of 0.8. The P2 computer is a 6 GHz machine with CPI of 1.2. How many times that computer is faster than another?CS & IT Suppose you wish to run a program P with 24.5 x 10 9 instructions on a 8 GHz ww machine with a CPI of 0.60. What is the expected CPU time to execute this program on this machine?
- 2. An implementation of the above RISC-V microprocessor has been designed where the supported instructions are classified as follows with regard to the number of cycles required to execute: Arithmetic & Logic: 4 cycles Memory Access: 5 cycles 3 cycles Branching: System Calls: 1 cycle What is the average CPI for this microprocessor? (includes lui, add, addi, or, ori, sub, and, (includes all loads and stores) (includes blt, beq, bne) (includes ecall) andi)Assume that we are going to compute C on both a single core shared memory machine and a 4-core shared-memory machine. Compute the speedup we would expect to obtain on the 4-core machine, ignoring any memory issues.Suppose that the execution time of a given program on a single processor is 9.5 ms. If you run this program on a system having 18 independent processors, you observe an overall speedup of 1.1. Using Amdahl’s Law, what must have been the fraction of the program that could be executed in parallel? (Express the answer in decimal form, i.e., if 50% of the program can be enhanced, enter 0.5. Round to three decimal places)
- When making changes to optimize part of a processor, it is often the case that speeding up one type of instruction comes at the cost of slowing down something else. For example, if we put in a complicated fast floating point unit, that takes space, and something might have to be moved farther away from the middle to accommodate it, adding an extra cycle in delay to reach that unit. The basic Amdahl?s law equation does not take into account this trade-off. a. If the new fast floating point unit speeds up floating point operations by, on average 2x, and floating operations take 20% of the original program's execution time, what is the overall speedup (ignoring the penalty to any other instructions)? b. Now assume that speeding up the floating point unit slowed down data cache accesses, resulting in a 1.5x (0r 2/3 speedup). Data cache accesses consume 10% of the execution time. What is the overall speedup now? c. After implementing the new floating point operations, what percentage of…If you wish to compute C, you should consider using a machine that has either a single core or four cores that share memory. Find out how much quicker a machine with four cores will be without taking memory restrictions into account.As a sort-of prediction for your midterm assignment, how many CPU cores do you think is ideal? Hint: think about Amdahl's Law, which describes the theoretical maximum speedup for a parallel program.