register is simply a group of flip-flops with each flip-flop storing a single bit. Thus, an N-bit register stores N bits of information. Often times, a register is attached to a combinational circuit that performs data processing tasks such as control and transfer of information (also called loading). Types of Registers The Shift Register is a type of register that is used for the storage or transfer of data in the form of binary numbers and then "shifts" the data out once every clock cycle. It implemented by several D-type latches connected in serial or daisy-chain arrangement such that the output from one data latch becomes the input of the next latch and so on. The data bits may be loaded serially in parallel. SHIFT REGISTER OPERATION Serial-in to Parallel-out (SIPO) - the register is loaded with serial data, one bit at a time, with the stored data being available in parallel form. Serial-in to Serial-out (SISO) - the data is shifted serially "IN" and "OUT" of the register, one bit at a time in either a left or right direction under clock control.
A register is simply a group of flip-flops with each flip-flop storing a single bit. Thus, an N-bit register stores N bits of information. Often times, a register is attached to a combinational circuit that performs data processing tasks such as control and transfer of information (also called loading).
Types of Registers
The Shift Register is a type of register that is used for the storage or transfer of data in the form of binary numbers and then "shifts" the data out once every clock cycle. It implemented by several D-type latches connected in serial or daisy-chain arrangement such that the output from one data latch becomes the input of the next latch and so on. The data bits may be loaded serially in parallel.
SHIFT REGISTER OPERATION
- Serial-in to Parallel-out (SIPO) - the register is loaded with serial data, one bit at a time, with the stored data being available in parallel form.
- Serial-in to Serial-out (SISO) - the data is shifted serially "IN" and "OUT" of the register, one bit at a time in either a left or right direction under clock control.
- Parallel-in to Serial-out (PISO) - the parallel data is loaded into the register simultaneously and is shifted out of the register serially one bit at a time under clock control.
- Parallel-in to Parallel-out (PIPO) - the parallel data is loaded simultaneously into the register, and transferred together to their respective outputs by the same clock pulse.
Universal Shift Registers can perform any combination of parallel and serial input to output operations but require additional inputs to specify desired function and to pre-load and reset the device.
Objectives:
At the conclusion of the experiment, you should be able to:
- Model Registers using HDL
- Run the program in the Altera board to verify the circuit functionality.
- Generate the corresponding circuit from the development software.
![2. Load the program to the Altera IC. Input the values given below and fill up the tables below
according to values obtained:
4 bit Shift Register (Contains 0100)
INPUT(Serial)
CLK
SELECT
Output
00
1
00
01
1
01
Shift Register (Contains 0000)
INPUT(parallel)
CLK
SELECT
Output
10
0000
10
1010
11
1111
11
0000
3. Generate the corresponding circuits of the program using the development tool. Draw the
generated circuit.](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F3059efa6-d370-4111-a684-c1c30f3d6bec%2Fc3e7f80e-6c2a-44ca-8309-7ff01a9559d5%2Fqi37oce_processed.png&w=3840&q=75)
![Equipment
1 DE1 kit
1 Personal computer
Procedure
1. Open Quartus Software. Create a module (Behavioral Level) for a 4 bit shift register. The
register will be capable of the following operations.
SELECT CODE
OPERATION
00
SIPO
01
SISO
10
PISO
11
PIPO
2. Load the program to the Altera IC. Input the values given below and fill up the tables below
according to values obtained:
4 bit Shift Register (Contains 0100)
INPUT(Serial)
CLK
SELECT
Output
00
1
00
01
1](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F3059efa6-d370-4111-a684-c1c30f3d6bec%2Fc3e7f80e-6c2a-44ca-8309-7ff01a9559d5%2F9q9r55_processed.png&w=3840&q=75)
![](/static/compass_v2/shared-icons/check-mark.png)
Step by step
Solved in 2 steps
![Blurred answer](/static/compass_v2/solution-images/blurred-answer.jpg)
![Computer Networking: A Top-Down Approach (7th Edi…](https://www.bartleby.com/isbn_cover_images/9780133594140/9780133594140_smallCoverImage.gif)
![Computer Organization and Design MIPS Edition, Fi…](https://www.bartleby.com/isbn_cover_images/9780124077263/9780124077263_smallCoverImage.gif)
![Network+ Guide to Networks (MindTap Course List)](https://www.bartleby.com/isbn_cover_images/9781337569330/9781337569330_smallCoverImage.gif)
![Computer Networking: A Top-Down Approach (7th Edi…](https://www.bartleby.com/isbn_cover_images/9780133594140/9780133594140_smallCoverImage.gif)
![Computer Organization and Design MIPS Edition, Fi…](https://www.bartleby.com/isbn_cover_images/9780124077263/9780124077263_smallCoverImage.gif)
![Network+ Guide to Networks (MindTap Course List)](https://www.bartleby.com/isbn_cover_images/9781337569330/9781337569330_smallCoverImage.gif)
![Concepts of Database Management](https://www.bartleby.com/isbn_cover_images/9781337093422/9781337093422_smallCoverImage.gif)
![Prelude to Programming](https://www.bartleby.com/isbn_cover_images/9780133750423/9780133750423_smallCoverImage.jpg)
![Sc Business Data Communications and Networking, T…](https://www.bartleby.com/isbn_cover_images/9781119368830/9781119368830_smallCoverImage.gif)