Q.7: Draw a logic circuit using only NAND gates for which output expression is X = AC +B C. Q.8: Draw a logic circuit using only NOR gates for which the output expression is X = AC + BC.
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- Q1) For the circuits shown in figures 1 and 2: 1. What is the function of output? 2. Find the max. and min. Vol. value? 3. Determine the static power (avg.)? 4. Design equivalent logic circuit by CMOC logic circuits? Use VDD= 10 V. Vr.o=1V. Vru-1V. (W/L)o= (5/2), (W/L)L (20/2), RD = 40k, KL = 10P A/V^2 and KO = 40pA/V`2? Figure 1 5 VDD RD Figure 2 बदना दे1. Design a logic circuit with four inputs A,B,C,D as shown in figure1 and one output Y and whose output will be high if only the input is evenly divisible by 3. A B LY D Figure1 I. Find the SOP Boolean expression of the output Y. I. Draw logic circuit using basic gate and verify the result by using any simulation tools. II. Draw a logic circuit by using NAND gate only. |Figure Q2(e) shows a programmable logic array (PLA) unit with two inputs, four columns, and three outputs. Show the steps to implement a one-bit comparator using this PLA. Note that the output should have equal (EQ), less than (LT), and greater (GT) status. A, 02 Figure Q2(e)
- A- Figure 1 shows a 2-input TTL NAND gate. 1). Discuss in details the operation of the NAND circuit 2). Is this circuit saturated logic circuits non-saturated logic? 3). Discuss in bravely the function of DI. +Vec =5V R1 4 kN 13多0 iz R2 1.6 k2 R3 130 2 VB1 Output V82 igo Co R4 1.0 K Figure 1VBE (on=Vac (RA) = 0.7V, V (sat) = 0.8V, Ve (sat= 0.15V,Vp (0n)=0.3V, 0 = 0.85, B = 0.25 %3D SED Q4. Open collector logic gate is shown in Figure. What logic function is performed by this circuit? | R F B O a. A B O b. A B A B O d. А. В O e. A· B А. ВA circuit in Figure Q.2a compares 2-bit binary numbers, P and Q represented by PiPo and QiQo respectively. Note that Po and Qo are LSB. (a) Determine under which condition Z will be '1'. (b) Redesign the circuit using active-high 4-to-16 decoder and a logic gate. Z P1 Q1 Figure 2a Po Qo D
- 2.3 A logic signal is required to give an indication when: a. the supply to an oven is on, and b. the temperature of the oven exceeds 300°C c. the temperature of the oven is less than 120°C. Devise a logic circuit using nor-gates only to meet these requirements.Exercise 3 a) Design a full-adder logic circuit using an active-low 2-to-4 decoder(s) and suitable logic gates.Below is an example of an NMOS logic circuit. For all of the MOSFETs in the circuit below, assume V = 1 V and k = 50 mA/V². th R₂ = 5600 R₁ = 4700 M3 Ao M₁ M₂ a. Indicate and verify the state of each MOSFET and V for the following input 0 combinations. Fill-out the table below for each assumed state of the MOSFET for every input combination. Use R approximation for linear operation and three significant ds(on) figures for the voltages. Example: M1 is assumed to be in saturation. If Vgs = 2 V, Vds = 4V, Vds > Vgs - Vth 4>2-1 4> 1 (ok) Vgs > Vth (2>1) A B M1 state M2 state M3 state V OV OV 5 V OV b. What kind of logic circuit is implemented in the circuit above? 5V www. V₂ 0
- 3. Draw a logic diagram using only two-input NAND gates to implement the following expression: F=(AB + A'B')(CD' + C'D)Draw the logic diagram and transistor implementation for a (2-2-2) AOI.5) You want to design an arithmetic comparison combined logic circuit.a. Write your design purpose of the 4-bit comparison (big-equal-small) circuit.b. List the process steps that you will apply in the design approach. Design a 4-bit comparison (large-equal-small) circuit. Explain each step. Realize with AND, OR, NOT gates.c. Compare the decimal numbers in the last two digits of your student number in the circuit you designed and discuss the result. last two digits of student number : 0 4 . Not : I want the solution to contain tables and equations, and the electrical circuit resulting from tables and equations, as in the picture that I attached,And if possible, Because it is normal when solving a question to have tables and equations. I want an integrated solution, please look at the question carefully before starting the solution because I have sent a question a lot