How would i create this chip in hdl (hardware description language) this is what ive got so far CHIP HiLoMux { IN in[8], sel; OUT out[4]; PARTS: } This is the chip im trying to create HiLoMux - This has one 8-bit input bus, in, and one 4-bit output bus, out. Also present is a sel input, which is used to select what appears on out. If sel is false, then out should contain the lower 4-bits of in (i.e. in[0], in[1], in[2], in[3]). If sel is true, then out should contain the upper 4-bits of in (i.e. in[4] mapped to out[0], in[5], mapped to out[1], etc.). In other words, the HiLoMux can be used to select a nibble from a byte…
How would i create this chip in hdl (hardware description language) this is what ive got so far CHIP HiLoMux { IN in[8], sel; OUT out[4]; PARTS: } This is the chip im trying to create HiLoMux - This has one 8-bit input bus, in, and one 4-bit output bus, out. Also present is a sel input, which is used to select what appears on out. If sel is false, then out should contain the lower 4-bits of in (i.e. in[0], in[1], in[2], in[3]). If sel is true, then out should contain the upper 4-bits of in (i.e. in[4] mapped to out[0], in[5], mapped to out[1], etc.). In other words, the HiLoMux can be used to select a nibble from a byte…
Chapter2: Introduction To Systems Architecture
Section: Chapter Questions
Problem 2VE: A(n) __________ is a storage location implemented in the CPU.
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How would i create this chip in hdl (hardware description language)
this is what ive got so far
CHIP HiLoMux
{
IN in[8], sel;
OUT out[4];
PARTS:
}
This is the chip im trying to create
HiLoMux - This has one 8-bit input bus, in, and one 4-bit output bus, out. Also
present is a sel input, which is used to select what appears on out. If
sel is false, then out should contain the lower 4-bits of in (i.e. in[0],
in[1], in[2], in[3]). If sel is true, then out should contain the
upper 4-bits of in (i.e. in[4] mapped to out[0], in[5], mapped to
out[1], etc.). In other words, the HiLoMux can be used to select a
nibble from a byte…
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