For a direct-mapped cache design with 32-bit addresses and 32-bit words (data and instructions). the following bits of the address are used to access the cache: Tag = [31:17], Index = [16:5], Offset = [4:0]. a.) What is the cache block size in 32-bit words. b.) How many blocks does the cache have? c.) What is the size of the cache in kilobytes?
For a direct-mapped cache design with 32-bit addresses and 32-bit words (data and instructions). the following bits of the address are used to access the cache: Tag = [31:17], Index = [16:5], Offset = [4:0]. a.) What is the cache block size in 32-bit words. b.) How many blocks does the cache have? c.) What is the size of the cache in kilobytes?
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
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![For a direct-mapped cache design with 32-bit addresses and 32-bit words (data and
instructions). the following bits of the address are used to access the cache: Tag = [31:17],
Index = [16:5], Offset = [4:0].
a.) What is the cache block size in 32-bit words.
b.) How many blocks does the cache have?
c.) What is the size of the cache in kilobytes?](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Ff035d4c0-8eb9-4a24-823e-c647f683dbc6%2Fa8509c7c-a069-4844-8bfa-523fe81afdc1%2Frarbwf7_processed.png&w=3840&q=75)
Transcribed Image Text:For a direct-mapped cache design with 32-bit addresses and 32-bit words (data and
instructions). the following bits of the address are used to access the cache: Tag = [31:17],
Index = [16:5], Offset = [4:0].
a.) What is the cache block size in 32-bit words.
b.) How many blocks does the cache have?
c.) What is the size of the cache in kilobytes?
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