Consider a virtual memory system providing 32 pages for each user program; the size of each page is 1KB. The size of main memory is 16KB. Consider one user program occupied 4 pages, and the page table of this program is shown as below: Logical page number | Physical block number 8 1 7 2 4 3 10 Assume there are three requests on logical address 0AC5H, 1AC5H, 3AC5H. First

Consider a virtual memory system providing 32 pages for each user program; the size of each page is 1KB. The size of main memory is 16KB. Consider one user program occupied 4 pages, and the page table of this program is shown as below: Logical page number | Physical block number 8 1 7 2 4 3 10 Assume there are three requests on logical address 0AC5H, 1AC5H, 3AC5H. First

Name: please answer in details within 30 minutes. Consider a virtual memory
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Description: please answer in details within 30 minutes. Consider a virtual memory system providing 32 pages for each userprogram; the size of each page is 1KB. The size of main memory is 16KB. Consider oneuser program occupied 4 pages, and the page table of this

C++ Programming: From Problem Analysis to Program Design

8th Edition

ISBN:9781337102087

Author:D. S. Malik

Publisher:D. S. Malik

Chapter12: Points, Classes, Virtual Functions And Abstract Classes

Section: Chapter Questions

Problem 19SA

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Main memory size is 16 pages. Size of swap file on hard disk is 64 pages. Operating system locks down pages 0, 1, 2 and 7 in the main memory. Two programs are started and both are provided with a virtual address space of 10 pages. Initially operating system allocates 5 pages of main memory for each program and the rest from swap file. Virtual address space of each program starts from page 0. Construct page tables for both programs at program startup. A page table consists of P-bit which tells if the page is present in the main memory (1 = page is in main memory) and address of the page. Address tells either real address in main memory or the address of the page in swap file. b. A computer with a paged virtual memory system executes two load instructions that are adjacent to each other in memory. Describe the worst case scenario (in terms of performance) that can occur during the execution of the two instructions and explain under which conditions this case occurs. How does this affect…
Consider a simple paging system with the following parameters: Size of the program = 256 bytes Page size of 16 bytes 2-Byte addressable memory Main memory is divided into 32 frames Page table for the program is as follows: Page No. 0 1 2 3 4 5 6 7 8 9 10 11 a) 49 b) 22 12 13 14 15 Frame No. 14 22 10 17 12 9 31 Convert the following logical addresses into physical addresses using the mathematical procedure. You are expected to show each and every step of your solution:
Suppose a computer using direct-mapped cache has 232 (that's 232)232) bytes of byte-addressable main memory, and a cache size of 512 bytes, and each cache block contains 64 bytes. How many blocks of main memory are there? What is the format of a memory address as seen by cache, i.e. what are the sizes of the tag, block, and offset fields? To which cache block will the memory address 0x13A4498A map?
In a main memory-disk virtual storage system, the page size is 1KByte and the OPTIMAL algorithm is used for page replacements. A given program has been allocated three page frames in the main memory and it makes the following 16 memory references when it starts executing (the addresses are given in decimal):500, 2000, 2500, 800, 4000, 1000, 5500, 1500, 2800, 400, 5000, 700, 2100, 3500, 900, 2400 Fill in the contents of the three page frames after each memory reference in a table and calculate the hit ratio. Hint: denote by 'a' the page consisting of locations 0 through 1023 in memory. Similarly, b: 1024-2047, c: 2048-3071, d: 3072-4095, e: 4096-5119 and f: 5120-6143. Round to three decimal places.
Memory address Data According to the memory view given below, if RO = Ox20008002 then LDRSB r1, [r0, #-4] is executed as a result of r1 = ?(data overlay big endian)? Øx20008002 ØXA1 Øx20008001 ØXB2 Øx20008000 Øx73 ØX20007FFE ØXD4 ØX20007FFE Lütfen birini seçin: O A. R1 = 0X7F O B. R1 = Oxffffffd4 O C. R1 = Oxffffff7F O D. R1=0XD4000000 O E. R1 = 0XD4
Program binaries in many systems are typically structured as follows. Code is stored starting with a small fixed virtual address such as 0. The code segment is followed by the data segment that is used for storing the program variables. When the program starts executing, the stack is allocated at the other end of the virtual address space and is allowed to grow towards lower virtual addresses. What is the significance of the above structure on the following schemes: a. contiguous-memory allocation b. pure segmentation c. pure paging
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Consider a computer with byte-addressable main memory of size 8 GB and page size of 1 KB. Assume a process P has a virtual address space from 0 to 3653 (decimal). Determine the width of the virtual address , the width of the page # field and the width of the offset field (Note: enter only the numbers e.g. 8 for 8 bits etc.)
In a main memory-disk virtual storage system, the page size is 1KByte and the FIFO algorithm is used for page replacements. A given program has been allocated three page frames in the main memory and it makes the following 16 memory references when it starts executing (the addresses are given in decimal):500, 2000, 2500, 800, 4000, 1000, 5500, 1500, 2800, 400, 5000, 700, 2100, 3500, 900, 2400 Fill in the contents of the three page frames after each memory reference in a table and calculate the hit ratio. Hint: denote by 'a' the page consisting of locations 0 through 1023 in memory. Similarly, b: 1024-2047, c: 2048-3071, d: 3072-4095, e: 4096-5119 and f: 5120-6143. Round to three decimal places.
A computer of 32 bits has a cache memory of 64 KB with a cache line size of 64 bytes. The cache access time is 20 ns, and the miss penalty is 120 ns. The cache is 2-way associative. a) What is the number of cache lines? b) What is the number of cache sets? c) What is the number of lines per set? d) Draw a scheme of this cache. e) Calculate the time to read a word in case of miss.
Consider a mini virtual memory system. It has a virtual address space of 2°. Each page is 2 bytes. There are 21 = 16 frames in the main memory.Initially, all the pages are on the hard disk. Assume the first two logical addresses generated by the CPU are 15 and 200. What are their physical addresses after their belonged pages are brought into the memory?Assume that each page is stored at the next available frames in the memory. no hand written
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