Assume a program requires the execution of 50 × 106 FP instructions, 110 × 106 INT instructions, 80 × 10ô L/S instructions, and 16 × 106 branch instructions. The CPI for each type of instruction is 1, 1, 4, and 2, respectively. Assume that the processor has a 2 GHz clock rate. By how much must we improve the CPI of FP instructions if we want the program to run two times faster? By how much must we improve the CPI of L/S instructions if we want the program to run two times faster? By how much is the execution time of the program improved if the CPI of INT and FP instructions is reduced by 40% and the CPI of L/S and branch is reduced by 30%? (FP: Floating Point, INT: Integer, L/S: Load Store)

Assume a program requires the execution of 50 × 106 FP instructions, 110 × 106 INT instructions, 80 × 10ô L/S instructions, and 16 × 106 branch instructions. The CPI for each type of instruction is 1, 1, 4, and 2, respectively. Assume that the processor has a 2 GHz clock rate. By how much must we improve the CPI of FP instructions if we want the program to run two times faster? By how much must we improve the CPI of L/S instructions if we want the program to run two times faster? By how much is the execution time of the program improved if the CPI of INT and FP instructions is reduced by 40% and the CPI of L/S and branch is reduced by 30%? (FP: Floating Point, INT: Integer, L/S: Load Store)

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Assume that a program requires the execution of 125x106 FP (floating point) instructions, 130x106 INT (integer) instructions, 150x106 L/S (load/store) instructions, and 110x106 branching instructions. These instructions have CPIs of 1, 1, 8 and 4, respectively. Assume that the processor has a 5 GHz clock rate. a. Is it possible to run the program twice as fast if we improve the CPI of just the L/S instructions? If so, by how much? Show your calculations. b. What is the Speedup in the execution time of the entire program if the CPI of INT and FP instructions is reduced by 40% and that of L/S and branching instructions is reduced by 50%?
Consider a hypothetical computer having instruction length 32 bit and Byte addressable memory. You need to run a program P having 10 Q.4 CO4 instructions 11,12,13...10. All the instructions are stored in consecutive memory locations started from 1000. To run an instruction li, you have to complete four operations: Fetch, Decode, Execute, and Store. The content of Program Counter will be after the completion of fetch operation of instruction 12. There are no jump or branch instruction in program P
Consider two computers, P1 and P2, of the same instruction set (ISA). We have a program of 7.5x10⁹ instructions and we want to run this program on P1 and P2. The P1 computer is a 5 GHz machine with CPI of 0.8. The P2 computer is a 6 GHz machine with CPI of 1.2. How many times that computer is faster than another?
Consider two computers, P1 and P2, of the same instruction set (ISA). We have a program of 7.5x10° instructions and we want to run this program on P1 and P2. The P1 computer is a 5 GHz machine with CPI of 0.8. The P2 computer is a 6 GHz machine with CPI of 1.2. What is the CPU time of P1 computer to run this program?
one Mil Q#1: Consider the instruction: add $2, $1, $3 What registers will be written and what registers will be read to execute this instruction? Registers to be written Registers to be read Q#2: Since we only support the add instruction, we don't care much for opcodes and funct codes and shamts. Therefore, suppose our programs are given to the processor as three inputs RD, RS, and RT. Each instruction executes within 1 clock periods Translate the following program to the RW, RS, RT inputs (in binary). clock period RD RS 1 2 3 4 RS RT Program add $2, $1, $3 add $0, $0, $1 add $1, $2, $2 add $1, $1, $1 Q#3: Design the single-cycle cessor datapath (only ID, EX and WB stages) using the mong different components. following datapath components.rly s the number of bits to be transferred in each data line and data bus connectio RD cik Registers RA RB RW BusA RegWrite Bus8 Bus W ALU zero ALU result overflow RT ALUOP
Suppose we have two implementations:Machine A has a clock cycle time of 10 ns. and a CPI of 2.0. Machine B has aclock cycle time of 20 ns. and a CPI of 1.2. Which machine is faster for thisprogram, and how much in percentage? Consider that the total instruction in the program is 1x10^9 or about 1,000,000,000 set of instructions since the cycle time is running in nanoseconds.
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Assume for a given program, 60% of the executed instructionsare of Class A, 10% are of Class B, and 30% are of Class C. Furthermore,assume that an instruction in Class A requires 3 cycles, an instruction inClass B requires 2 cycles, and an instruction in Class C requires 2 tocomplete. i. Compute the overall CPI for this program.ii. Compute the clock rate of the CPU when the time it takes tocomplete 20 instructions is 1.73 ???????????
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