Assume a 32-bit processor, with memory pages of 4 KiB. We use a two-level page table, where the first level covers big pages of 4 MiB and the second level covers pages of 4 KiB; each PTE on both level takes 4 bytes. Now, assume that a process uses two segments of 16 KiB, both aligned on a 4-MiB boundary, and separated by an empty area of 8 MiB. How much much space would the page table take total, in bytes? *(you have to write a precise number)*

Assume a 32-bit processor, with memory pages of 4 KiB. We use a two-level page table, where the first level covers big pages of 4 MiB and the second level covers pages of 4 KiB; each PTE on both level takes 4 bytes. Now, assume that a process uses two segments of 16 KiB, both aligned on a 4-MiB boundary, and separated by an empty area of 8 MiB. How much much space would the page table take total, in bytes? (you have to write a precise number)

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...

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Consider a 32-bit microprocessor, with a 16-bit external data bus, driven by an 8-MHz input clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate across the bus that this microprocessor can sustain in bytes/s? To increase its performance, would it be better to make its external data bus 32 bits or to double the external clock fre- quency supplied to the microprocessor? State any other assumptions you make and explain. Hint: Determine the number of bytes that can be transferred per bus cycle.
Correct and detailed answer Assume a 32-bit processor, with memory pages of 4 KiB. We use a two-level page table, where the first level covers big pages of 4 MiB and the second level covers pages of 4 KiB; each PTE on both level takes 4 bytes. Now, assume that a process uses two segments of 16 KiB, both aligned on a 4-MiB boundary, and separated by an empty area of 8 MiB. How much much space would the page table take total, in bytes? *(you have to write a precise number)*
Suppose we have a byte-addressable computer using fully associative mapping with 16-bit main memory addresses and 32 blocks of cache. Supposed also that each block contains 16 bytes. The size of the offset field is 19 bits and the size of the block field is 0.625 bytes.
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