2.4 [10] <§§2.2, 2.3> For the RISC-V assembly instructions below, what is the corresponding C statement? Assume that the variables f, g, h, i, and j are assigned to registers ×5, x6, x7, x28, and x 29, respectively. Assume that the base address of the arrays A and B are in registers x10 and x11, respectively. slli x30, x5, 3 add x30, x10, x30 slli x31, x6, 3 add x31, x11, x31 x5, 0(x30) 1w addi x12, x30, 8 1w x30, 0(x12) || x30 f*8 || x30 // x31 = = &A[f] g*8 &B [g] // x31 // f = A[f] =

2.4 [10] <§§2.2, 2.3> For the RISC-V assembly instructions below, what is the corresponding C statement? Assume that the variables f, g, h, i, and j are assigned to registers ×5, x6, x7, x28, and x 29, respectively. Assume that the base address of the arrays A and B are in registers x10 and x11, respectively. slli x30, x5, 3 add x30, x10, x30 slli x31, x6, 3 add x31, x11, x31 x5, 0(x30) 1w addi x12, x30, 8 1w x30, 0(x12) || x30 f8 || x30 // x31 = = &A[f] g8 &B [g] // x31 // f = A[f] =

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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A, B are two integers arrays. The base address of A and B are in register x10 and x11, respectively. Register x10 holds number 8 and register x11 holds number 20. Variables i and j are in x12, and x13 respectively. The size of each array element is 4 bytes for both arrays A and B. Write the RISC-V assembly code for the following C statement (Use only true instructions). B[3*i-4]=A[16 *j-i] + 12;
Please solve and show all work. Thank you. What is the corresponding MIPS assembly code for the following C statement? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 4-byte words: f = g + (h − 5); B[8] = A[i] + A[j+1];
[3.3] For the following C statement, write the corresponding RISC-V assembly code. Assume that the variables f, g, h, i, and j are assigned to registers x5, x6, x7, x28, and x29, respectively. Assume that the base address of the arrays A and B are in registers x10 and x11, respectively. B[8] A[i-j];
For the following C statement, write the corresponding RISC-V assembly code. Assume that the base addresses of long long int arrays A and B are in registers x6 and x7 respectively. Each element of A or B is 8 bytes, and the variables i and j are assigned to registers x5 and x10 respectively. j = B[A[i*2]] - 16;
[3.4] For the RISC-V assembly instructions below, what is the corresponding C statement? Assume that the variables f, g, h, i, and j are assigned to registers x5, x6, x7, x28, and x29, respectively. Assume that the base address of the arrays A and B are in registers x10 and x11, respectively. slli x30, x5, 2 add x30, x10, x30 slli x31, x6, 2 add x31, x11, x31 lw x5, 0(x30) addi x12, X30, 4 lw x30, 0(x12) add x30, x30, x5 sw x30, 0(x31) #x30 = f*4 # x30 = &A[f] # x31 = g*4 # x31 = &B [g] # f = A[f]
Please look at the entire text below. Please solve and show all work. Thank you. What is the corresponding MIPS assembly code for the following C statement? Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[8] = A[i−j] Translate the following C code to MIPS. Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: B[8] = A[i] + A[j] Assume that registers $s0 and $s1 hold the values 0x80000000 and 0xD0000000, respectively. What is the value of $t0 for the following assembly code? add $t0, $s0, $s1 Is the result in $t0 the desired result, or has there been an overflow? For the contents of registers $s0 and $s1 as…
QuedT: Choose the correct answer: [ Opcode, funct3 and funct7/6 in instruction format are used to identify the: (a) function. (b) instruction. (e) branch. (d) memory address. The register that hold the address of the current instruction being executed is called: (a) saved register. (b) global pointer. (e) stack pointer. (d) program counter. Placing the executable file into the memory for execution by the processor is the role of (a) assembler. (b) linker. (e) loader. (d) compiler. The part which responsible for transmitting the data to/from the processor is: (a) control unit. (b) Datapath. (c) data bus. (d) memory. Parallel hardware cannot be used for faster division because: (a) subtraction is conditional on sign of remainder. (b) multiplication is conditional on sign of remainder. (c) subtraction is conditional on sign of divisor. (d) multiplication is conditional on sign of divisor. we cannot slower the clock cycle to fit the floating-point adder algorithm into one clock cycle…
3. For the following C statement, write the corresponding MIPS assembly code. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[i-j] = A[8]; 4.Translate the following C code to MIPS. Assume that the variables, f,g. h, i, and j are assigned to registers $s0, $s1, $s2, $s3, $s4, and $s4, respectively. Assume that the base address of A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: B[8] = A[i] + A[j]; 5.For the MIPS assembly instructions below, what is the corresponding C statement? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. You must add line comments to ALL uncommented 4 lines. sll $t0, $s0, 2 #…
1- For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[8] A[i-j];
Assume variable h is associated with register X21 and the base address of the array A is in X22. What is the LEGv8 assembly code for the C assignment statement below? A[12] = h+ A[8]:
Convert the C code below into RISC-V assembly language for the following two scenarios: a) Variable fis assigned to register x5. b) Variable fis assigned to register x20 Arguments a and b are available in x10 and x11 according to RISC-V convention. The return value is stored in x10 according to RISC-V convention. Return address is available in x1. Note: avoid unnecessary write operations to Stack memory long long int leaf_example (long long int a, long long int b) { long long int f; if (a == b) f=a + b; else f=a – b; return f; }
For the RISC-V assembly instructions below, what is the corresponding C statement? Assume that the variables f, g, h, i, and j are assigned to registers x5, x6, x7, x28, and x29, respectively. Assume that the base address of the arrays A and B are in registers x10 and x11, respectively: sub x30, x28, x29 slli x30, x30, 2 add x3, x30, x10 add x4, x30, x11 lw x30, 0 (x3) 1w x31, 0 (x4) add x30, x30, x31 sw x30, 16 (x11)