2. Which type of multiplexing can not be used for Analog signalling? a) FDM b) TDM c) WDM d) None 3. The expected information contained in a message signal is called a) Entropy b) Coded signal c) Efficiency d) None
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Please assist with question 3 with details on how to do it. Thank you
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- (i) Below (figure 1) is an example of a VHDL code for a multiplexer. --multiplexer.vhd --Common Multiplexer LIBRARY ieee; USE ieee.std_logic_1164.ALL; ENTITY multiplexer IS PORT(el, d3, d2, d1, d0 : IN STD_LOGIC; a,b.c,d,e,f.g.h.ij.k,lm,n:OUT STD LOGIC); END multiplexer; ARCHITECTURE mult OF multiplexer IS SIGNAL input : STD LOGIC_VECTOR (4 downto 0); SIGNAL output : STD LOGIC_VECTOR (13 downto 0); BEGIN input ca el & d3 & d2 & d1 & d0; WITH input SELECT "00000010000001"WHEN "10000",--Input A "00000010000001"WHEN "10001",- "00000010000001"WHEN "10010",- "00000010000001"WHEN "10011",- "00000011001111"WHEN "10100" "00000011001111"WHEN "10101 "00000011001111"WHEN "10110" "00000011001111"WHEN "10111" "10011110000001"WHEN "11000" "10011110000001"WHEN "11001" "10011110000001"WHEN "11010, "10011110000001"WHEN "11011" "10011111001111"WHEN "11100" "100111110011i1"WHEN "11101",- "10011111001111"WHEN "11110",-- "10011111001111"WHEN "11111":-. "00000010000001" -00 --"00000011001111"-01…4. A data signal with bipolar voltage levels is shown below. The decision threshold is 0 volts. The logic levels are +1 volt for logic 1 and -1 volt for logic 0. Noise with the P.D.F. shown corrupts the signal. Find the probability of error at some instant of time on the condition that logic 0 is sent. LOGIC 1 +1 VOLT -2 1/2 دمت ~IN kla THRESHOLD +2 NOISE P.D.F. -I VOLT. LOGIC 0Q6: Sectoring is a way to do what? a. Achieve branch circuits. b. Put each phone call in a different time slot. c. Do SS7 look-ahead call placement. d. Partition Voice mail boxes e. It is an ISDN-PRI way of brining in trunks f. Achieve frequency reuse. g. None of the above
- Given that the base address is FoH. 1. Create a new asm project “Lab2_Q1.asm". Assume that port A of 8255A PPI is connected to 8085. Write assembly code to send the value of FFH to FoH. Enter a delay of 2 ms for each transmission.Exercise (3): A modem transmits using an 4-level signaling technique. If each signaling element has duration of 0.5ms. (a) Show the timing-diagram for a data stream 10111000111100010011 (b) Find the baud Rate and the bit Rate (c) How could you duplicate the transmission speed? Show the timing-diagram for a given data stream in (a). (d) How many bits per level are required if a modem using 7-level signalling mode? Exercise (4): A device is sending out data at the rate of 1000 bps. a. How long does it takes to send out 10 bits? b. How long does it take to sent out a single character (8bits)? c. How long does it take to send a file of 100,000 characters?2. Digital signal is also compatible with multiplexing in what type? A. TDM B. FDM C. WDM D. All of the above
- The following data are transmitted in a serial communication system (P is the parity bit). What parity is being used in each case? a. ABCDEFGHP = 010000101 b. ABCDEFGHP = 011000101 c. ABCDP = 01101 d. ABCDEP = 101011 e. ABCDEP = 111011Question 3. Select the correct statement regarding the modulated FSK waveform.a. The modulated signal does not accurately represent the message because the amplitude of the modulated signal does not change with changes in the logical data.b. The modulated signal indicates changes in frequency, but no changes in amplitude. Therefore, the modulated signal is distorted and does not accurately represent the logical data.c. It can be seen that logical “1s” and “0s” are accurately represented by changes in carrier frequency; therefore, the modulated signal accurately represents the logical data.d. There are no accurate statements above.Implement 8-bit asynchronous ripple counter and showing truth table, timing diagram. Also show how it can be used as frequency divider?
- Answer all questions below: 1. Draw the general block diagram of Frequency Division Multiplexing (FDM) 2. Multiplexing is a technique that allows the (simultaneous) transmission of multiple signals across a single data link. Figure Q2 below shows a multiplexer with four 500 kbps data stream inputs and 1 data stream output where the unit of data is 1 bit. Determine: i. ii. iii. 500 kbps The type of multiplexing technique used. The input bit duration. The output bit rate. 500 kbps 500 kbps. 500 kbps. ... ... ... 1 0 1 0 1 0 1 0 0000 1 1 1 1 0 1 0 0 MUX Figure Q2 Frames 0101 0001 110100010101what is idss value?Q22) This true or false Question from DIGITAL COMMUNICATIONS Course,just write for me the final answer. The bit error probability for orthogonal signaling is greater than the bit error probability for bipolar signaling. a. True b. False