1. Construct circuit 2 in DEEDS. Connect all inputs to input switches and output F to Output (1 bit)
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- Convert the state diagram given below to ASM chart. Additionally, implement the control circuit using multiplexors. A/1 00 01, 10 11 11. C/O 01,10 00 ó1,10 B/0 11 001.1 Design a circuit for the traffic light unit in Multisim. The design should include 3 positive edge triggered D flip-flops. Set your clock signal to 1Hz. Please include Four screenshots of your working circuit, with each screenshot showing each of the light configurations shown in Figure 1. 000 100 010 110 001 Figure 1. A state diagram for a traffic light control The design should include 3 positive edge triggered D flip-flops. Use 1 flip-flop to control the on and off of a given light, and the state machine should switch from Red (100) -> Red and Amber (110) - > Green (001) -> Amber (010) and repeat the cycle again, with the following transition table: Current state Next state 000 100 100 110 110 001 001 010 010 100 ABC A*B*C* Table 1. A transition table for the traffic light unitQ4/ Chose the correct data input for 4-1 multiplexer that used to Design the switching network F F(A,B,C,D.E)=Em( * 0, 1, 3, 15, 24, 30) +d( 6,12,29)
- Here's a table showing the tco and tro for each of the components in the circuit bellow. Please compute tco and tpo for the whole circuit? tco tPD B Inverter 0.1 ns 0.6 ns AND2 0.4 ns 0.8 ns C XOR2 0.5 ns 1.8 ns MUX2 0.5 ns 1.5 nsDraw an ASM chart for the synchronous circuit having the following description, "The circuit has a control input X. clock and outputs A and B. If X = 1, on every clock rising edge the code on BA changes from 00 01 10 →1100 and repeats. If X=0, the circuit holds the present state.".3. Design and implement a circuit using positive edge triggered DFFS that generates a pulse (p = 1) on the 2nd, 3rd, 5th, and 7th clock cycles after initialization. The sequence should repeat every 8 clock pulses. Include an asynchronous reset signal. %3!
- 10. Consider you are interfacing a switch and two LEDS (L1 and L2) with LPC1769 MCU. • When the switch is ON (logic HIGH), LI is ON, and L2 is OFF. • When the switch is OFF (logic LOW), L1 is OFF, and L2 is ON. • Switch is interfaced with port 1- pin 2, L1 with port 1- pin 3, and L2 with port 1- pin 4. • Initially L1 is ON, and L2 is OFF. Complete the C program template for this task given below. Demonstrate all steps: Pin function configuration, mode selection, and writing/reading of pin values correctly. #include int main (void)2. Design and implement a combinational circuit that adds three bits (x,y, and z) and returns the sum S and carry C.2. Design a combinational circuit with three inputs, x, y, and z, and three outputs, A, B, and C. When the binary input represents any of the decimal digits 1, 2, 3, or 6, the binary output should represent the decimal digit that is one greater than the input, that is 2, 3, 4 and 7, respectively. Similarly, when the binary input represents any of the digits 4, or 7, the binary output should represent the digit that is two less than the input. The remaining two inputs, that are the binary representations of the decimal digits 0 and 5 never occur. Draw the truth table, and give all the minimal forms for the functions that represent the outputs A, B, and C. U
- 3. Design an appropriate combinational circuit that implements a digital system with the following output functions an AC remote: ON, OFF, MODE, SHIFT, FAN, SMART, SWING, ECO using a decoder.1. Compute 910 X 510 in binary.. 2. Implement the following logic gates in CMOS technology a. 4-input OR gate b. 3-input NAND gate 3. Design the CMOS circuit of F = XY + Z 4. Implement the following logic circuit using CMOS a. Derive the SOP equation of the circuit b. Design the CMOS circuit based on the SOP equation IUCHO A B 3 4:1 F MUXDesign the simplest circuit that has three inputs, a, b, and c, which returns an output value of 1 whenever g and b are complements of each other or b and c are complements of each other, otherwise the output is 0. Realize the circuit using 4input , 3output PAL