1) With respect to memory, which of the following expressions tells us that the data remains intact every if we remove all external sources of power? (a) Saturated (b) Static c) Dynamic (d) Non-volatile
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- For a microprocessor similar to ATmega328p an 8 bit ADC uses a VREF = 3.3 V. When an analog read is executed the return value is 112. What Voltage is present on the input? Enter the value in the box provided in mV. Round to the nearest mV.Discuss transistor logic in your own words23. Determine the step size for a 4-bit ADC having a range of 10V. Also, convert an analog sample of 3V into the 4-bit digits using Successive approximation method. Please show all steps/comparisons/SAR comparison rules used for each step to obtain full points.
- T: Answer thne f. questions: 1) The hexadecimal number ´Al' has the decimal value equivalent to (A) 80 (B) 161 (C) 100 (D) 101 2) The output of a logic gate is 0 when all its inputs are logic 1. The logic is either (A) a NAND or an EX-OR (B) an OR or an EX-NOR (C) an AND or an EX-OR (D) an NOR or an EX-NOR 3) The Gray code of the Binary number 1100111 is (A) 1011011 (B) 1010100 (C) 1001001 (D) 101101 4) When simplified with Boollean Algebra (a+b)(a+c) simplifies to (A) a (B) a+a(b+c) (C) a(1+bc) (D) a+bc 5) -31 is represented as a sign Binary number ( using Sign-magnitude form ) equal to (A) 00011111 (B) 10101001 (C) 01110010 (D) 00101101 6) The Binary number 110111 is equivalent to decimal number (A) 25 (B) 55 (C) 26 (D) 34 7) With 4 bit, what the range of decimal values if the number is 2's complement signed number. (A) -32 to +31 (B) -2 to +1 (C) -8 to +7 (D) None of these(a). If I want to store 4-bit data 0110 and at 4th clock I want to extract all the stored bits, which shift register I should explain it with the help of circuit diagram and table. (b). Write comparison between Diode transistor logic and Transistor Transistor logicBelow is an example of an NMOS logic circuit. For all of the MOSFETs in the circuit below, assume V = 1 V and k = 50 mA/V². th W R₂ = 5600 PEETHIPPIN R₁ - 4700 M3 M₁ M. 0 a. Indicate and verify the state of each MOSFET and V for the following input combinations. Fill-out the table below for each assumed state of the MOSFET for every input combination. Use R approximation for linear operation and three significant ds(on) figures for the voltages. 오 Ao SV why
- Q 1. (a) Specify the memory location and its contents after the following instructions are executed. MVI B, F7H MVI A, B STA XX75H HLT (b) Calculate the analog voltages corresponding to the LSB, MSB, and the full-scale for an 8-bit D/A converter calibrated for a 0 to 10 V range.a) Design a single-digit decade counter that counts from 0 to 9 and repeats. The single-digit decade counter should be built by a cascaded synchronous binary counter (74LS163) and other basic logic gates. Simulate thecomplete counter circuit by OrCAD and PSPICE. Capture the circuit schematic and the simulated waveform.(Define the simulation timings for at least one full counting cycle from 0 to 9 and back to 0.)(Hint: Use the DigClock input from the SOURCE as shown below and setup the CLK ONTIME and OFFTIME accordingly for the clock source.)Consider Analog to Digital Converters, calculate the following for a 3-bit quantizer with a range from -5 to 5 V. a) How many levels does this ADC have? b) Determine the quantization step size c) Determine the quantization error d) In case the accuracy required imposes a quantization error less than 4 mV, what is the specification needed for the used ADC?
- 20. An S-R latch does which of the following? A. adds two binary digits, taking the carry value into account B. acts as a memory circuit for a single binary digit C. contains multiple S-R latch circuits D. selects a single output value from a set of input values E. merges multiple input values into a single output valueThe input to a combinational logic circuit is 4-bit binary number (A, B, C, D). Design the circuit strictly using NAND gate with two outputs (Y1 and Y2) for the following conditions: Output Y1 is low when the input binary number is less than or equal to 7. Output Y2 is high when the input binary number is less than or equal to 7.Assume that the contents of 8086 microprocessor registers are: DS= 3300H, CS-1033H, SS= 1614H, SP= 1200H, and IP= 3400H. If the stack memory located at physical memory location 26130H, does the segment cover this range? If not, what changes need to be made?